1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor device and, more particularly, to a method of forming an isolation structure of a high-integration device requiring scaling-down.
2. Discussion of Related Art
In order to increase the density of a semiconductor chip having a predetermined size, the scale of isolation regions needs to be reduced. In high-integration devices such as GIGA DRAM requiring the greatest reduction in the size of isolation regions, however, it is difficult to accurately form an isolation structure pattern using a deep ultraviolet (DUV) light generally used in photolithography. A method for overcoming such problems arising from using the DUV light has been proposed and will be discussed below.
FIGS. 1A to 1F are cross-sectional views of a portion of a semiconductor device illustrating a conventional method of fabricating the semiconductor device.
According to the conventional method, as illustrated in FIG. 1A, a pad oxide film 12 and a first nitride film 13 are sequentially deposited on a silicon substrate 11. Subsequently, as illustrated in FIG. 1B, a mask of photoresist pattern 14 is formed on the first nitride film 13. The photoresist layer is exposed to the light having a DUV wave length and developed to form the photoresist pattern 14.
As illustrated in FIG. 1C, the first nitride film 13 is subjected to dry etching to form the first nitride film 13' and to expose a surface of the pad oxide film 12.
As illustrated in FIG. 1D, the photoresist pattern 14 is completely removed. Thereafter, a second nitride film 15 is deposited on the entire surface of the first nitride film 13' and the exposed surface of the pad oxide film 12 by using chemical vapor deposition (CVD). As illustrated in FIG. 1E, the second nitride film 15 is selectively etched to form sidewall spacers 15'. As illustrated in FIG. 1F, the exposed portion of the pad oxide film 12 is removed to expose a predetermined portion of the silicon substrate 11. A field oxide film 16 is formed on the exposed portion of the silicon substrate 11. Then the sidewall spacers 15', the first nitride film 13' and the pad oxide film 12 are completely removed, thereby forming an isolation structure on the silicon substrate 11.
As described above, the conventional method of forming an isolation structure utilizes the sidewall spacers 15', instead of the DUV light, to define a fine pattern for forming an isolation region. However, such a method has problems because it is difficult to pattern a CVD nitride film to form uniform sidewall spacers within a wafer. Therefore, the conventional method complicates the manufacturing process and has a problem of reduced yield.